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 iC-NE
LIGHT-GRID PULSE RECEIVER
Rev E1, Page 1/9 FEATURES o Photoelectric amplifier adapted to standard photodiodes o Built-in bandpass filter with 300 kHz center frequency o Differential current-signal output with open drain low-side drivers o Nonlinear transfer function results in wide dynamic range of 100 nA to 1.5 mA for pulsed photocurrents o Fast flash recovery time of max. 30 s o Recovery time below 10 s for excessive photocurrents of up to 1.8 mA o 3-step shift register and control logic o Compatible to CMOS levels o Single 5 V supply o Low standby current; circuit activation by input data o Power-down reset o Suited for high-risk applications according to IEC 61496-1 o ESD protection o Option: extended temperature range of -20 to 85 C APPLICATIONS o Light curtains o Light barriers o Electro-sensitive protective equipment (ESPE)
PACKAGES
SO8
MSOP8
BLOCK DIAGRAM
+5V 2 VDD BP-AMPLIFIER PHOTO DIODE
OUTPUT
SN SP
5 4
iC-NE
EN
8
PD
EN
INH
LOGIC INPUTS
CONTROL LOGIC 1
BIAS
BIAS 1 DIN
FF1 FF2 Q1 D C R Q Q2 FF3 D C R Q Q3
LOGIC OUTPUT DOUT 6
6A 3 CLK 6A
D C R
Q
POWER DOWN RESET GND 7
Copyright (c) 2007 iC-Haus
http://www.ichaus.com
iC-NE
LIGHT-GRID PULSE RECEIVER
Rev E1, Page 2/9 DESCRIPTION The iC-NE device is a light-grid receiver IC. Typical applications cover light curtains, light barriers and electro-sensitive protective equipment in general. Integrated on a single silicon chip the iC-NE contains a bandpass amplifier with a center frequency of typically 300 kHz, a differential current-signal output plus control logic to activate the amplifier and the output. Deactivated, the current consumption is very low and the current-signal outputs SN and SP are switched to high impedance (zero current). The logic consists of a three-stage shift register in which the first two stages are triggered by the rising edge of the clock input CLK. The third flipflop is triggered with the falling clock edge, which produces an artificial delay in order to avoid race conditions when shifting the input data via the serial output to the next device in the chain. The bandpass amplifier is activated when DIN reads a logical 1. The output stage still remains disabled (zero current) until the output of the first flipflop changes to 1. This activates the bias for the complete signal path from light detection to the differential current output. The differential outputs SP and SN are powered up to an equal current, as far as the attached photodiode does not receive any changes in light. The rising edge of a received light pulse (which produces an increase of photocurrent), causes the output current at SP to increase and at SN to decrease by an equal value. The sum of I(SP) + I(SN) is kept constant. For light curtain applications in which only one device is activated at a time, the outputs SN and SP can be attached to a two-wire bus. After processing the serial input data at DIN, the activated amplifier and output automatically return to standby mode, when the clock input receives the second rising edge. Therefore, a chain circuitry with multiple beams has to be set up with just a single data bit within a shift cycle. The IC contains protective diodes to prevent destruction by ESD. Logic input pins feature Schmitt-trigger characteristics for high noise immunity. All pins are short-circuit proof.
PACKAGES SO8, MSOP8 to JEDEC Standard PIN CONFIGURATION SO8 (top view)
1 8
PIN FUNCTIONS No. Name Function
PD
DIN
2 7
VDD
GND
3
6
CLK
4
DOUT
5
SP
SN
1 2 3 4 5 6 7 8
DIN VDD CLK SP SN DOUT GND PD
Data Input +5 V Supply Voltage Clock Input Pos. Differential Current Output Neg. Differential Current Output Data Output Ground Photocurrent Input, photodiode cathode
PIN CONFIGURATION MSOP8 (top view)
1 DIN VDD CLK SP PD GND DOUT SN
code... ...
NE
iC-NE Code
iC-NE
LIGHT-GRID PULSE RECEIVER
Rev E1, Page 3/9 ABSOLUTE MAXIMUM RATINGS
Beyond these values damage may occur; device operation is not guaranteed. Item No. Symbol Parameter Voltage at VDD Voltage at DIN, CLK, DOUT, SN, SP, PD ESD Susceptibility at DIN, CLK, DOUT, HBM, 100 pF discharged through 1.5 k PD, SN, SP Junction Temperature Storage Temperature -40 -40 Conditions Min. -0.5 -0.5 Max. 7 VDD + 0.5 2 150 150 V V kV C C Unit
G001 VDD G002 V() G003 Vd() G004 Tj G005 Ts
THERMAL DATA
Operating Conditions: VDD = 5 V 10% Item No. T01 Symbol Ta Parameter Operating Ambient Temperature Range (extended temperature range of -20 to 85 C on request) Conditions Min. 0 Typ. Max. 70 C Unit
All voltages are referenced to ground unless otherwise stated. All currents into the device pins are positive; all currents out of the device pins are negative.
iC-NE
LIGHT-GRID PULSE RECEIVER
Rev E1, Page 4/9 ELECTRICAL CHARACTERISTICS
Operating Conditions: VDD = 5 V 10%, V(SN, SP) = VDD - 2 V...VDD, Tj = -20...85 C, unless otherwise stated Item No. 001 002 003 Symbol Parameter Conditions Min. VDD VDD I(VDD) Permissible Supply Voltage Range Required Supply Voltage for logic decreasing voltage VDD function Supply Current in VDD (Standby) DIN = lo, CLK = hi or lo: BP-amplifier and output stage disabled, logic levels: lo = 0...0.45 V, hi = VDD - 0.45 V...VDD Supply Current in VDD EN = hi: BP-amplifier activated, INH = hi: output stage disabled, I(PD) = -15...0 A Tj = 27 C EN = hi, INH = lo: BP-amplifier and output stage activated Tj = 27 C 4.5 1.7 60 Typ. Max. 5.5 V V A Unit
Total Device
004
I(VDD)
0.5 0.3 3.0 1.1 4.2
mA mA mA mA V V
005
I(VDD)
Supply Current in VDD
006 007 008 009 010
VDDon VDDoff VDDhys Vc()hi Vc()lo
Turn-on Threshold VDD (Power-on release) Undervoltage Threshold at VDD (Power-down reset) Hysteresis Clamp Voltage hi at DIN, CLK, DOUT, PD, SN, SP Clamp Voltage lo at DIN, CLK, DOUT, PD, SN, SP Permissible capacitance at PD Voltage at PD Permissible DC-photocurrent in PD (ambient light supression) Monotone Gain Range of I(PD)pk |Ipn()| increases or remains constant when |I(PD)pk| increases (see Fig. 3) Permissible Photocurrent Pulse Duration Permissible Photocurrent Pause Duration Flash Recovery Time Power-Flash Recovery Time Pulse Current Gain (see Fig. 3, 4) 2nd Gpk 90% 1st Gpk resp. of single pulse (see Fig. 4) I(PD)pk = -1.8 mA I(PD)pk = -5 mA, magnitude of photocurrent integral equals 15 mAs Gpk = (Ipn() - IO ISUM) / I(PD)pk; I(PD)dc = -15...0 A, I(PD)pk = -1...-0.1 A, tr = tf = 0.5 s, twpk = 1 s (see Fig. 3) I(PD)dc = -15...-2.5 A, I(PD)ac = 5 App sinusoidal waveform I(PD)dc = -15...-2.5 A, I(PD)ac = 5 App sinusoidal waveform f = fh - fl V()out = VDD - V() 360 490 -15 -1.5 1.0 2.0 0.9 decreasing voltage VDD VDDhys = VDDon - VDDoff Vc()hi = V() - VDD, I() = 1 mA I() = -10 mA, VDD = 0 V, other pins open 2.6 200 0.4 -1.25
500 1.25 -0.4
mV V V
Bandpass Amplifier and Output Stage PD, SN, SP 101 102 103 104 105 106 107 108 109 C(PD) V(PD) I(PD) I(PD)mg twhi twlo trec trec Gpk 100 0 0 pF V A mA s s 10 30 620 s s
110 111 112 113
fl fh f V()out
Lower Cut-off Frequency (-3 dB) Upper Cut-off Frequency (-3 dB) Bandwidth (-3 dB) Permissible Output Voltage Range at SN, SP with reference to VDD Output currents I(SN) + I(SP) Relative Current Offset Leakage Current I(SN) + I(SP) Differential Leakage Current
65 380 270
100 530 430
155 750 670 2
kHz kHz kHz V
114 115 116 117
ISUM IO Ilk Idlk()
V(SN, SP) = 4...5 V Tj = 27 C IO = (I(SN) - I(SP)) / ISUM; I(PD) = 0 Tj = -20 C output disabled Idlk() = I(SN) - I(SP); I(PD)pk = -600 A, twhi = 3 s, output disabled (see Fig. 3)
4.9 7.5 -10 -15 -0.1
9.7 10 15 4.0 0.1
mA mA % % A A
iC-NE
LIGHT-GRID PULSE RECEIVER
Rev E1, Page 5/9 ELECTRICAL CHARACTERISTICS
Operating Conditions: VDD = 5 V 10%, V(SN, SP) = VDD - 2 V...VDD, Tj = -20...85 C, unless otherwise stated Item No. 118 119 120 121 122 123 Symbol Ipn() Ipn() INoise INoise tp()IDCon tp()IDCoff Parameter Differential Output Current Differential Output Current Conditions Min. Ipn() = I(SN) - I(SP); I(PD)pk = -10 A (see Fig. 3) Ipn() = I(SN) - I(SP); I(PD)pk = -100 A (see Fig. 3) -7.0 -9.7 Typ. -5.0 -7.3 5 3.5 3.0 3.0 Max. -3.0 -4.0 mA mA A A s s Unit
Differential Output Current Noise I(PD)dc = -15 A, Rgen = 500 k, no additional (RMS) filter, Tj = 27 C (see Fig. 5) Differential Output Current Noise I(PD)dc = -15 A, Rgen = 500 k, with BP-filter (RMS) 50 kHz...1.2 MHz, Tj = 27 C (see Fig. 5) Output Stage Turn-on Delay: CLK lo hi to 90% I(SN), I(SP) Output Stage Turn-off Delay: CLK lo hi to 10% I(SN), I(SP) Threshold Voltage hi Threshold Voltage lo Schmitt-Trigger Input Hysteresis Pull-Down Current V() = 1 V...VDD Tj = 27 C Vs()hi = VDD - V(DOUT); I() = -4 mA I() = 4 mA V() = 0 V Tj = 27 C V() = VDD Tj = 27 C CL() = 50 pF Tj = 27 C CL() = 50 pF Tj = 27 C CL(DOUT) = 50 pF (see Fig. 2) Tj = 27 C CL(DOUT) = 50 pF (see Fig. 2) Tj = 27 C -100 33 400 3 I(PD)dc = -15 A...0, I(PD)ac = 0 (see Fig. 4) I(PD)dc = -15 A...0, I(PD)ac = 0 (see Fig. 4)
Control Inputs DIN, CLK 201 202 203 204 Vt()hi Vt()lo Vhys() Ipd() 66 %VDD %VDD mV 12 6 0.4 0.4 -25 -40 25 40 60 20 60 20 60 26 60 25 100 A A V V mA mA mA mA ns ns ns ns ns ns ns ns
Output Buffer DOUT 301 302 303 304 305 306 Vs()hi Vs()lo Isc()hi Isc()lo tr() tf() Saturation Voltage hi Saturation Voltage lo Short-Circuit Current hi Short-Circuit Current lo Rise Time Fall Time
Timing Characteristics 401 tplh(CLK- Propagation Delay: DOUT) CLK hi lo until DOUT lo hi 402 tphl(CLK- Propagation Delay: DOUT) CLK hi lo until DOUT hi lo
CLK
t set (DIN)
DIN
t hold (DIN)
Q1
V VDD-0.45V Vt()hi Input/Output
Q2
Vt()lo 0.45V 1 0 t
Q3
t plh (CLK-DOUT)
DOUT
t phl (CLK-DOUT)
Figure 1: Reference levels
Figure 2: Timing characteristics
iC-NE
LIGHT-GRID PULSE RECEIVER
Rev E1, Page 6/9
I(PD)
t
1st 2nd
t whi
I(PD)pk 2
CLK
t en
DIN
Q1
I(PD)pk
Q2
tr
I(SP) -I(SN)
Ipnpk
t wpk
tf
Q3
DOUT
EN1
INH= Q1
t inh
I(PD) V(SP)
t wlo
t whi t p ( ) IDCoff
t p ( ) IDCon
Offset (= IO*ISUM) may be positive or negative
t
V(SN)
Figure 3: Differential output current pulse at SP and SN versus input current pulse at PD
Figure 4: Timing characteristics (analogue section), outputs SP and SN with resistors to VDD
I(PD)dc
1 VDD 5V RA 100k CA 10uF
DIN
PD
8
RGen
Control Logic
uA
500k
adjust VS for I(PD)dc= -15uA VS approx. -6V
2
VDD
GND
7
INH
EN
mA
6
DOUT SN
ISUM
VRR 4V+RL*ISUM/2 adjust until ISUM stops rising Differential Amplifier - + R1 110 Gain=10 BW= 10MHz
3
CLK
RL 1k 5
RL 1k
4
SP
C2
iC-NE
330pF C1 1.2nF
R2 10k
V
RMS- Voltmeter
Figure 5: Noise measurement circuit
OPERATING REQUIREMENTS: Logic
Operating Conditions: VDD = 5 V 10%, Ta = 0...70 C, CL() = 50 pF, input levels lo = 0...0.45 V, hi = VDD - 0.45 V...VDD, see Fig. 1 for reference levels and waveforms Item No. Symbol Parameter Activation Time: DIN lo hi to CLK lo hi Output Activation Time: 1st CLK lo hi until output ready to report Setup time: DIN stable before CLK lo hi Hold time: DIN stable after CLK lo hi Permissible Frequency at CLK Conditions Min. Standby to amplifier operation (see Fig. 4) Sufficient decay of transient differential output current: |I(SN) - I(SP) - IO ISUM| 20 A (see Fig. 4) (see Fig. 2) (see Fig. 2) 10 5 Max. s s Unit
I001 ten I002 tinh
I003 tset I004 thold I005 fo
50 50 10
ns ns MHz
iC-NE
LIGHT-GRID PULSE RECEIVER
Rev E1, Page 7/9 APPLICATIONS INFORMATION Signal Processing Figures 6 and 7 show output signal I(SP) - I(SN) in normal drive and in extreme overdrive (with the photodiode and input amplifier in saturation). extreme overdrive, which yields definite results. Evaluating the falling edge of the output signal or the level of the negative output signal half-wave (the recovery process at the end of a light pulse) is generally not advised.
Figure 6: Regular input signals Figure 7: Excessive input signals It is clear from these diagrams that iC-NE, even when in overdrive, is not blind to a follow-on pulse. For evaluation purpose the response to the rising edge of the light pulse (i.e. the rising edge of the output signal) is to be used as it is this edge alone, even in the most
CLK +5V
Light curtain The circuit in Figure 8 shows iC-NE chained up to form a light curtain, where consecutive PIN diodes receive and evaluate clock-driven light pulses.
IC1
CONTROL LOGIC DIN1 1 DIN PD 8 PD1 1
IC2
C CONTROL LOGIC DIN PD 8 PD2 GROUP 1
ICn
CONTROL LOGIC DIN PD 8 PDn
2
VDD
GND
7
2
VDD
GND
7
2
VDD
GND
7
INH 3 CLK 4 SP
EN 6 DOUT SN 5 4 DO1 3
INH
EN 6 DO2 3
INH
EN 6 DOn
CLK SP
DOUT SN 5 4
CLK SP
DOUT SN 5
iC-NE
iC-NE
iC-NE
SN SP
GND
Figure 8: Schematic of a chain configuration When discussing the function of iC-NE, it is assumed that all flip-flops in IC1...ICn have been reset, for example after the operating voltage has been switched on. The signal DIN1 = hi activates the IC1 bandpass amplifier and the bias of the differential output stage. Outputs SP and SN remain tri-state until the rising CLK edge shifts in the input hi signal.
iC-NE
LIGHT-GRID PULSE RECEIVER
Rev E1, Page 8/9 With no AC photocurrent fractions in the receiver photodiode, approximately equal currents are drawn in SP and SN. Within a time tinh 5 s, the transient differential currents in the output stage, caused by switching the chip on, have decayed, and iC-NE is ready to receive. Current is drawn from PD (IC1) by a light pulse on the photodiode PD1, and the currents at outputs SP and SN react as shown in Figure 9: I(SP) rises and returns to the initial value with a time constant determined by the lower bandpass amplifier cut-off frequency, as long as the photodiode is constantly illuminated. When the light pulse decays, the current in SP first sinks and then ramps up to the standby value. The current in SN has a mirror-imaged time dependence, as the sum I(SP) + I(SN) is constant. With DIN1 = 0, the next rising CLK edge resets FF1 and turns off the currents in the differential output stage. Simultaneously, FF1 sends the stored information to FF2. FF3 also accepts this information with the trailing CLK edge and activates the bandpass amplifier and the bias in the next device, IC2, via the output driver. The pulse diagram is also valid for the subsequent components in the chain, i.e. the ICs arranged as a light curtain form a clock-driven shift register which passes on the input information.
DIN1
CLK
Q1(IC1)
DO1
DO2
DO3
RECEIVED LIGHT PULSE
PD1
PD2
PD3
I(SP)
I(SN)
Figure 9: Signals for the chain configuration of Fig. 8 Light curtain PCB layout The PCB layout for light curtain receivers is not critical. The photodiode anode should be directly connected to iC-NE's GND pin so that voltage drop caused by the chip's operating current is not coupled into the photocurrent signal. As the power consumption is relatively small, only lowlevel back-up capacitors are required (typically 1 F electrolytic capacitor in parallel to 47...100 nF ceramic capacitor). The ceramic capacitors should be placed at a distance of 7.5 cm apart, electrolytic capacitors at up to twice this distance. The number of receivers backed up as a group in this manner is irrelevant as only one device is activated and draws current at a time.
This specification is for a newly developed product. iC-Haus therefore reserves the right to change or update, without notice, any information contained herein, design and specification; and to discontinue or limit production or distribution of any product versions. Please contact iC-Haus to ascertain the current data. Copying - even as an excerpt - is only permitted with iC-Haus approval in writing and precise reference to source. iC-Haus does not warrant the accuracy, completeness or timeliness of the specification on this site and does not assume liability for any errors or omissions in the materials. The data specified is intended solely for the purpose of product description. No representations or warranties, either express or implied, of merchantability, fitness for a particular purpose or of any other nature are made hereunder with respect to information/specification or the products to which information refers and no guarantee with respect to compliance to the intended use is given. In particular, this also applies to the stated possible applications or areas of applications of the product. iC-Haus conveys no patent, copyright, mask work right or other trade mark right to this product. iC-Haus assumes no liability for any patent and/or other trade mark rights of a third party resulting from processing or handling of the product and/or any other use of the product.
iC-NE
LIGHT-GRID PULSE RECEIVER
Rev E1, Page 9/9 ORDERING INFORMATION
Type iC-NE
Package SO8 MSOP8
Order Designation iC-NE SO8 iC-NE MSOP8
For technical support, information about prices and terms of delivery please contact: iC-Haus GmbH Am Kuemmerling 18 D-55294 Bodenheim GERMANY Tel.: +49 (61 35) 92 92-0 Fax: +49 (61 35) 92 92-192 Web: http://www.ichaus.com E-Mail: sales@ichaus.com
Appointed local distributors: http://www.ichaus.de/support_distributors.php


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